Cycle-based simulation software is used to simulate electronic devices to decrease the cost and complexity of building large electronic systems, microprocessors, and ASICs. Such simulation software is much faster than event-driven simulators, and has performance levels that approach those of more expensive hardware accelerators.
One cycle-based simulation software product, SpeedSim/3 available from SpeedSim, Inc. of Chelmsford, Mass. is able to perform up to 32 tests simultaneously on one image of the design model on a single workstation. This technique of simultaneously running multiple diagnostics or application program streams results in a 5 to 10 times performance gain in total throughput.
Large microprocessors include many state devices. When such microprocessors are powered up, the values of the state devices are unknown. However, their values must converge each time an initialization sequence is completed. The SpeedSim/3 product is a two-state simulator that does not have the provision for simulating an unknown state. Accordingly, the SpeedSim/3 product must assign a value of 1 or 0 to any state device involved in the test. When the initialization sequence of a device under test is being tested, for the test to be successful the output pin values of all of the state devices must converge to a single solution after each initialization sequence test. If the value of even a single state device changes from one initialization sequence to another, there is a design problem which must be resolved. Thus, to use a two-state simulator to test device initialization sequences, provision must be made for the inability to simulate an unknown state.
Large device designs require lengthy test procedures. Some designs can take days to test using cycle-based simulation software such as the SpeedSim/3 product. If an error occurs during the test, it can be extremely time consuming to find the error source. To do so typically requires the creation of a tracing file that slows the simulation test, and creates a large data file that must be reviewed to pinpoint the error. Alternatively, the simulation can be rerun, and the data can be saved for analysis. In either case, it is extremely difficult and time-consuming to locate the source of an error. Additionally, these error pinpointing procedures tie up valuable test hardware that could be used to perform additional testing.